1. Field of the Invention
The present invention relates to a semiconductor apparatus, and particularly to an improved semiconductor apparatus having an insulation coating section at an outer section of an outer lead so as to reduce the number of inferior products which occurs at the time of bonding a fine pitch outer lead.
2. Description of the Conventional Art
Generally, a tape automated bonding (TAB) is related to a surface real mounting type package technique which is directed to bonding a large scale integrated circuit (LSI) using a metal bump to a tape on which a metal pattern is formed. That is, it is related to an interconnection technique for directly bonding the LSI and a lead frame. Compared with a conventional wire bonding method, the TAB technique is one of advanced interconnection techniques.
Thesedays, leading companies in the industry are trying to develop the bump formation technique because it is one of key technologies in the industry.
The bump in the TAB plays a function of wire of the wiring bonding method. The bump is formed as a metallic protrusion capable of electrically connecting the pad of the LSI chip and the lead frame of the TAB. Here, the bump is classified into Au bump and Sn/Pb bump in accordance with its material, and is classified into a mushroom type bump and a straight wall type bump.
The bump bonding technique, which is one of key technologies in the industry, is classified into the following three fabrication methods in accordance with a bump formation method.
1) The lead frame accessing method--the lead bumping method and a transferred bumping method. PA1 2) The wafer level accessing method--the wire bumping method. PA1 3) The chip level accessing method--the wire bumping method. PA1 1) The lead frame accessing method: This method uses a common wafer, and is adaptable to fabricate various kinds of the products and small amount of the same; however, the bumped lead tape is costly. PA1 2) The wafer bumping method: It is adaptable to fabricate various kinds of the products and small amount of the same; however, TAB process is additionally necessary according to the wafer bumping, and accuracy rate is decreased. PA1 3) The wire bumping method: It is adaptable to fabricate a small size pin product; however, it is not adaptable to fabricate a small size multi-pin product.
Meanwhile, the above-mentioned methods has the following disadvantages, respectively.
The products made in TAB process is transferred to a set-maker, and it is mounted on the substrate.
FIG. 1 shows an interconnection after an outer lead bonding of a conventional semiconductor apparatus.
As shown in FIG. 1, spaced-apart bonding pads 2 are formed on the upper portion of the substrate 1. In addition, the TAB tape includes outer leads 5 on which metallic pattern is formed in cooperation with an adhesive 4 on a certain portion of the insulation tape 3. The outer leads 5 of the TAB and the substrate 1 are adhered by a heterogenous adhesive such as an anisotropic conductive adhesive (ACA) or an anisotropic conductive film (ACF) by controlling pressure and temperature.
Meanwhile, conductive balls 6 are inserted between the outer leads 5 and the bonding pads 2. In addition, conductive balls 6a irrespective of the conductive balls 6 are inserted between the outer leads 5. However, as the semiconductor product becomes multi-functional and has a high performance and a multi-pin structure, the pad/lead pitch of the product becomes finesse.
Since the conventional semiconductor apparatus have the conductive balls 6a which is irrespective of the conductive balls 6 adopted for electrical interconnection, electric short-circuit between corresponding elements occurs.